The SNO 32-channel Front End Card

D.F. Cowen, D. McDonald, R. Van Berg, R. Van de Water, and P. Wittich
University of Pennsylvania
Thu Dec 28 12:26:58 EST 1995

• Introduction
• The Output Data
• The Mother Board Registers
  • Discrete Registers
  • Sequencer Registers
  • CMOS Internal Registers
• Programming the Front End Card
  • The FPGAs
    • Introduction
    • How to load a Xilinx FPGA
  • The DACs
  • The High Voltage Card
  • The Board ID Registers
    • Reading the ID Register
    • Writing to the ID Register
• References
• About this document ...