Introduction

This document describes the SNO 32-channel front end card, which consists of a mother board (MB) and 4 daughter boards (DBs). The DBs are connected to the MB via several PCB-to-PCB connectors. The MB is mostly digital while the DB contains all the custom ASICs and hence is primarily analog. The MB contains

• four field programmable gate arrays (FPGAs) which take the place of what would otherwise be vast numbers of discrete logic chips. These FPGAs are the Sequencer, FIFO controller, CGT24 global trigger counter, and the BREGST register address controller. (See Sec. 4.1 on page for programming information.)
  • The Sequencer primarily manages the movement of data from the custom ASICs to the on-board memory. It also contains various registers and can be reprogrammed to handle various testmode operations.
  • The FIFO controller keeps track of where data has been placed in the on-board memory.
  • The CGT24 global trigger counter extends the 16-bit CMOS built-in trigger counter to 24 bits. It also adds error checking.
  • The BREGST contains all the logic necessary to address registers on the MB and/or DB.

• the ADCs, used to convert the analog outputs of the PMTs into digital signals;

• the memory controller and the on-board memory, used to buffer digitized data prior to its being read out by the DAQ system;

• the serial DACs, used to program reference voltages;

• the calibration DAC, used to calibrate the ADCs;

• the discrete registers, used to set up the MB/DB and monitor things;

• various voltage supplies and references;

• trigger circuitry;

• temperature monitor;

• various connectors and bus signal transceivers;

• a board ID chip with a permanently programmed unique ID number plus additional memory for unspecified future use;

• LED indicators of various voltages and signals.

The DB contains

• the SNO integrator chip;
• the SNO discriminator chip;
• the SNO CMOS chip;
• a board ID chip;
• various connectors.

The external connections of the MB to the high voltage cards and to the DAQ system are described in ``SNO Electronics Overview'' by R. Van Berg.