Barrel Patch Panel Mapping
Here
is the short crib sheet for the ROD PP connectors on the ROD side -
starting
from the top of the board (the connector Toni labels J10)
we have
the following Data Out Signals (get detailed pinouts
from Toni's docs)
J10 3S1...3S23 (11 Quadralateral
and 12 Triangle DTMs) 23 Outs
J6 3L2-1..14 (the 3L2 Triangle) 14 Outs
J4 2L6...2L17??;
3L1-1..3L1-13 (3L1 Quad + 2L Triang) 22 Outs
J5 2S1..2S15; 2L1-1..2L1-9 (2S + 2L Quad) 24 Outs
J8 1S1..1S10; 1L1..1L11 (Both type 1 boards) 21 Outs
The
silkscreen numbering is confusing for 2L, but the division must be
as
outlined above.
TTC Line Offset |
FE |
FE |
+0 |
2L1 |
- |
+1 |
2L2 |
- |
+2 |
3S1 |
- |
+3 |
3S2 |
1S |
+4 |
3L1 |
1L |
+5 |
3L2 |
2S |
TTC Line offsets are based on
the TTC connector used: 0 for connector 0, 6 for connector 1 and 12 for
connector 2.
1BS (TTC +3) [Mask 0xFFC]
Position |
HW Addr |
ROD In Con |
ROD Out Con |
Sub Group |
Mask |
1 |
1 |
0 |
0 |
1 |
0x4 |
2 |
2 |
0 |
0 |
1 |
0x8 |
3 |
3 |
0 |
0 |
1 |
0x10 |
4 |
4 |
0 |
0 |
1 |
0x20 |
5 |
5 |
0 |
0 |
1 |
0x40 |
6 |
6 |
0 |
0 |
1 |
0x80 |
7 |
7 |
0 |
0 |
1 |
0x100 |
8 |
8 |
0 |
0 |
1 |
0x200 |
9 |
9 |
0 |
0 |
1 |
0x400 |
10 |
10 |
0 |
0 |
1 |
0x800 |
Sub Group 0 is read out
first, followed by Sub Group 1.
1BL (TTC +4) [Mask 0x7F:F000]
Position |
HW Addr |
ROD In Con |
Rod Out Con |
Sub Group |
Mask |
17 |
|
0 |
0 |
1 |
0x100 |
18 |
|
0 |
0 |
0 |
0x1 |
19 |
|
0 |
0 |
|
0x2 |
20 |
|
0 |
0 |
|
0x4 |
21 |
|
0 |
0 |
|
0x8 |
22 |
|
0 |
0 |
|
0x10 |
23 |
|
0 |
0 |
|
0x20 |
24 |
|
0 |
0 |
|
0x40 |
25 |
|
0 |
0 |
|
0x80 |
26 |
|
0 |
0 |
|
0x100 |
27 |
|
0 |
0 |
|
0x200 |
Sub Group 0 is read out
first, followed by Sub Group 1.
2BS (TTC +5) [Mask 0x1:FFFC]
Position |
HW Addr |
ROD In Con |
ROD Out Con |
Sub Group |
Mask |
1 |
1 |
1 |
1 |
1 |
0x4 |
2 |
2 |
1 |
1 |
1 |
0x8 |
3 |
3 |
1 |
1 |
1 |
0x10 |
4 |
4 |
1 |
1 |
1 |
0x20 |
5 |
5 |
1 |
1 |
1 |
0x40 |
6 |
6 |
1 |
1 |
1 |
0x80 |
7 |
7 |
1 |
1 |
1 |
|
8 |
8 |
1 |
1 |
1 |
0x200 |
9 |
9 |
1 |
1 |
1 |
0x400 |
10 |
10 |
1 |
1 |
1 |
|
11 |
11 |
1 |
1 |
1 |
0x1000 |
12 |
12 |
1 |
1 |
0 |
0x1 |
13 |
13 |
1 |
1 |
0 |
0x2 |
14 |
14 |
1 |
1 |
0 |
0x4 |
15 |
15 |
1 |
1 |
0 |
|
Sub Group 0 is read out
first, followed by Sub Group 1.
2BL1 (TTC +0) [Mask 0x3FE:0000]
Position |
HW Addr |
ROD In Con |
ROD Out Con |
Sub Group |
Mask |
17 |
17 |
|
1 |
0 |
0x10 |
18 |
18 |
|
1 |
0 |
0x20 |
19 |
19 |
|
1 |
0 |
0x40 |
20 |
20 |
|
1 |
0 |
0x80 |
21 |
21 |
|
1 |
0 |
0x100 |
22 |
22 |
|
1 |
0 |
0x200 |
23 |
23 |
|
1 |
0 |
0x400 |
24 |
24 |
|
1 |
0 |
0x800 |
25 |
25 |
|
1 |
0 |
0x1000 |
Sub Group 0 is read out
first, followed by Sub Group 1.
2BL2 (TTC +1) [Mask 0x7FC]
Position |
HW Addr |
ROD In Con |
ROD Out Con |
Sub Group |
Mask |
26 |
26 |
|
2 |
1 |
0x4 |
27 |
27 |
|
2 |
1 |
0x8 |
28 |
28 |
|
2 |
1 |
0x10 |
29 |
29 |
|
2 |
1 |
0x20 |
30 |
30 |
|
2 |
1 |
0x40 |
31 |
31 |
|
2 |
1 |
0x80 |
32 |
32 |
|
2 |
1 |
0x100 |
33 |
33 |
|
2 |
1 |
0x200 |
34 |
34 |
|
2 |
1 |
0x400 |
Sub Group 0 is read out
first, followed by Sub Group 1.
3BS1 (TTC +2) [Mask 0x1FFC]
Position |
HW Addr |
ROD In Con |
ROD Out Con |
Sub Group |
Mask |
1 |
1 |
4 |
4 |
1 |
0x4 |
2 |
2 |
4 |
4 |
1 |
0x8 |
3 |
3 |
4 |
4 |
1 |
0x10 |
4 |
4 |
4 |
4 |
1 |
0x20 |
5 |
5 |
4 |
4 |
1 |
0x40 |
6 |
6 |
4 |
4 |
1 |
0x80 |
7 |
7 |
4 |
4 |
1 |
0x100 |
8 |
8 |
4 |
4 |
1 |
0x200 |
9 |
9 |
4 |
4 |
1 |
0x400 |
10 |
10 |
4 |
4 |
1 |
0x800 |
11 |
11 |
4 |
4 |
1 |
0x1000 |
Sub Group 0 is read out
first, followed by Sub Group 1.
3BS2 (TTC +3) [Mask 0x1FF:E000]
Position |
HW Addr |
ROD In Con |
ROD Out Con |
Sub Group |
Mask |
12 |
12 |
|
4 |
0 |
0x1 |
13 |
13 |
|
4 |
0 |
0x2 |
14 |
14 |
|
4 |
0 |
0x4 |
15 |
15 |
|
4 |
0 |
0x8 |
16 |
16 |
|
4 |
0 |
0x10 |
17 |
17 |
|
4 |
0 |
0x20 |
18 |
18 |
|
4 |
0 |
0x40 |
19 |
19 |
|
4 |
0 |
0x80 |
20 |
20 |
|
4 |
0 |
0x100 |
21 |
21 |
|
4 |
0 |
0x200 |
22 |
22 |
|
4 |
0 |
0x300 |
23 |
23 |
|
4 |
0 |
0x400 |
Sub Group 0 is read out
first, followed by Sub Group 1.
3BL1 (TTC +4) [Mask 0xFF:F800]
Position |
HW Addr |
Rod In Con |
ROD Out Con |
Sub Group |
Mask |
33 |
33 |
|
2 |
1 |
0x800 |
34 |
34 |
|
2 |
1 |
0x1000 |
35 |
35 |
|
2 |
0 |
0x1 |
36 |
36 |
|
2 |
0 |
0x2 |
37 |
37 |
|
2 |
0 |
0x4 |
38 |
38 |
|
2 |
0 |
0x8 |
39 |
39 |
|
2 |
0 |
0x10 |
40 |
40 |
|
2 |
0 |
0x20 |
41 |
41 |
|
2 |
0 |
0x40 |
42 |
42 |
|
2 |
0 |
0x80 |
43 |
43 |
|
2 |
0 |
0x100 |
44 |
44 |
|
2 |
0 |
0x200 |
45 |
45 |
|
2 |
0 |
0x400 |
Sub Group 0 is read out
first, followed by Sub Group 1.
3BL2 (TTC +5) [Mask 0xFFFC]
Position |
HW Addr |
ROD In Con |
ROD Out Con |
Sub Group |
Mask |
46 |
46 |
|
3 |
1 |
0x4 |
47 |
47 |
|
3 |
1 |
0x8 |
48 |
48 |
|
3 |
1 |
0x10 |
49 |
49 |
|
3 |
1 |
0x20 |
50 |
50 |
|
3 |
1 |
0x40 |
51 |
51 |
|
3 |
1 |
0x80 |
52 |
52 |
|
3 |
1 |
0x100 |
53 |
53 |
|
3 |
1 |
0x200 |
54 |
54 |
|
3 |
1 |
0x400 |
55 |
55 |
|
3 |
1 |
0x800 |
56 |
56 |
|
3 |
1 |
0x1000 |
57 |
57 |
|
3 |
0 |
0x1 |
58 |
58 |
|
3 |
0 |
0x2 |
59 |
59 |
|
3 |
0 |
0x3 |
Sub Group 0 is read out
first, followed by Sub Group 1.