Suggestion for Driving Ternary Inputs from 3.5V logic output. 1) We measure at the TERNP and TERNN inputs .980V and 1.05V respectively. For DSM the design is different and may change. but not by a lot. 2) Objective is to pull current in nearly equal units in the range 180uA < unit < 230uA. With standard Ternary count of 0, -1, -2 units.. DC coupled resistors seem to cause problems so lets build a simple diode switch that switches 1 unit of ternary current. Two coupled in parallel will pull two units which is good for one ternary input. Each ternary input (two inputs per channel) has two independent diode switches that steer 1 or 2 units of current independently into the ternary receiver. Four switches total per ternary receiver The diode is a standard silicon diode 0.7V typical. To keep the capacitance low we can use a three pin dual diode common anode type like a ??BAW56?? or other low capacitance (2pF) device. The anode goes to the Ternary input. The two cathodes each connect to a two resistor series combination as shown below. 1 UNIT current control ( one of two that attach to a common anode dual diode per ternary input.) Assume FBGA output (0,3.5V) negative voltage -3V supply ....Schematic.... FBGA out>--R2---cathode---R1---<-3V R1=20K R2=8.2K CASE 1 'zero' state FBGA out = 0 1 unit of current flows into ternary input. Diode is 'on' so V(cathode) = 1V-.7 = .3V I unit = .3V/8.2K + 3.3V/20K = 202uA CASE 2 'true' state FBGA = 3.5V No current thru diode if Vcathode > 1V --Drop across R1 > 4V V(R1) = 6.5V(R1/(R1+R2)) = 4.6V Possible problems include a slow response due to capacitance at the junction of the two resistors and diode. I recommend that the resistor divider network be located near the dual diode pack and that the dual diode pack be located near the ternary input. Decouple the -3V supply near the ternary receiver(s) to gnd. If this doesn't work we may need to replace the diodes with transistor current sources. hope this helps, Mitch