Status of Daughter Board Debugging at Penn, Part 1
Approximately 250 DBs were sent to Penn from Queen's for debugging.
The goal is to determine if we can categorize boards with
problems without extensive measurement time so that we can
quickly determine which chip (if any) needs replacement.
We plan to use the level 3 testing code here at Penn to help determine
if fixed boards were in fact fixed. Queens will also need to test these
boards.
Results
Problem Class |
Number of DBs |
Fixed |
Unfixed |
Unknown |
Queens Pass |
Queens Fail |
SNOD | 32 | 14 | 17 | 1 | ? | ? |
SNOI | 17 | 9 | 2 | 6 | ? | ? |
Component | 2 | 1 | 1 | | ? | ? |
CMOS | ? | | | | ? | ? |
No Problem Found
| 5 | | | | ? | ? |
Double Counts
| -7 | | | | | |
Totals | 49 | 24 | 20 | 7 | 15 sent |
Notes:
- Queens tests are absolutely critical to continued progress. If it
turns out that (say) we are damaging CMOS chips during our debugging
process we will want to know that as soon as possible.
- Double counts are boards for which a chip replacement did not work
so another chip was replaced.
- There is a reasonable chance that the 20 failed boards are mainly
symptomatic of test stand and test stand user teething pains, and that
these boards will be reparable.
- The "component" problem class included one missing resistor which, when
replaced, fixed the board, and one replaced capacitor, whose replacement
did not fix the board. About 20 boards are expected to have problems of
this nature, in particular those for which resistor replacement fixes the
failure of the board to balance.
- About 10 boards have trigger problems which should be fixable, but they will
be looked at later.
- The SNOD problem class above was comprised of about 20 boards which were preselected for
low impedance on the integrator. Thus the SNOD sample was enriched in this
type of problem. It is unknown at present how this will affect future SNOD
repair yields.
- The amount of time it takes to diagnose a DB is ROUGHLY 15 minutes,
and 10 minutes to replace a chip (done by a separate person).
It then takes about 5 minutes to recheck
the DB to see if the replacement has worked. In about 1/4 of the cases, this
cycle has to be repeated when another chip on the same DB is replaced.
The total time per board thus comes to about 20-25 minutes.
We are currently spending a total of about
40 person-hours/week on this activity, so unless these numbers are way off, we
would be done in about 3 weeks if not for the fact that we are going to lose about half of
the total labor during finals, which start in about 2 weeks, and over Christmas break.
Status of Chip Testing
The following numbers are all to be considered very rough ballpark numbers.
They are
Chip Testing
Chip |
Number Marked Bad |
Fraction Passing |
Number "Unmarked" |
Fraction Passing |
Testing Time |
Number Passed So Far |
SNOI |
1500-2000 |
? |
500-1000 |
? |
4 minutes |
6 |
SNOD |
1500-2000 |
? |
500-1000 |
0.03 |
1 minute |
100 |
This page maintained by
Doug Cowen (cowen@dept.physics.upenn.edu)
Last updated on $Date: 1997/12/05 16:01:19 $ by $Author: cowen $